Yaoyu Tao

Yaoyu Tao

Boya Assistant Professor

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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.

Pages

Posts

One paper accepted at Nature Electronics

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One paper, featuring fast and reconfigurable sort-in-memory system enabled by memristors, is accepted by Nature Eletronics.

One paper accepted at Nature Communications

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One paper, featuring memristor-enabled fully on-chip physical unclonable function named as RePACK , is accepted by Nature Communications.

One paper accepted at HPCA 2025

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One paper, featuring Programmable Probabilistic Processing Unit Architecture with Accept/Reject Prediction & Multicore Pipelining for Causal named PROCA, is accepted by 2025 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

One paper accepted at IEDM 2024

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One paper, featuring PCM memristor based neural manifold learning accelerator with conductance drift compensation, is accepted by IEDM 2024 as regular paper.

One paper accepted at Advanced Materials

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One paper, featuring full van der waals ambipolar ferroelectric configurable optical hetero‐synapses for in‐sensor computing, is accepted by Advanced Materials.

One paper accepted at Nature Electronics

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One paper, featuring A scalable universal Ising machine based on interaction-centric storage and compute-in-memory, is accepted by Nature Electronics.

One paper accepted at MICRO 2024

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One paper, featuring memristor-enabled memory-centric instruction-set architecture (MeMCISA) aiming to efficiently accelerate versatile workloads in modern database systems, is accepted by MICRO 2024 as regular paper.

One paper accepted at Nature Communications

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One paper, featuring VO2 memristor-based frequency converter with in-situ synthesize and mix for wireless internet-of-things, is accepted by Nature Communications.

One paper accepted at HPCA 2023

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One paper, featuring an Energy-Efficient and Low-Latency Edge Inference and Training of Neural ODEsnamed as eNODE, is accepted by 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

One paper accepted at FPGA 2023

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One paper, Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search, is accepted by 2023 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA).

Two papers accepted at ISCAS 2022

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Two papers, Fast and scalable memristive in-memory sorting with column-skipping algorithm, and High-Throughput Split-Tree Architecture for Nonbinary SCL Polar Decoder, are accepted by 2022 IEEE International Symposium on Circuits and Systems (ISCAS).

One paper accepted at MICRO 2021

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One paper, HiMA: A Fast and Scalable History-based Memory Access Engine for Differentiable Neural Computer, is accepted by 54th IEEE/ACM International Symposium on Microarchitecture (MICRO).

One paper accepted at IEEE Symposium on VLSI Circuits (VLSI)

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One paper, A 3.25 Gb/s, 13.2 pJ/b, 0.64 mm2 Configurable Successive-Cancellation List Polar Decoder using Split-Tree Architecture in 40nm CMOS, is accepted by 2019 IEEE Symposium on VLSI Circuits (VLSI) .

portfolio

Compute-in-memory architecture and chip design

Constructing architecture, chips and computing systems that integrate storage and computation together using emerging post-Moore devices such as memristors, targeting artificial intelligence and communication algorithms.

Pipelined dataflow architecture and chip design

Constructing efficient chips and hardware systems for AI and signal processing using architectural techniques such as multi-stage pipelining, out-of-order execution, heterogeneous on-chip networks, and AI-assisted design.

publications

talks

Talk 1 on Relevant Topic in Your Field

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This is a description of your talk, which is a markdown files that can be all markdown-ified like any other post. Yay markdown!

teaching